Problem

Dead, occasionally displays garbage.

Diagnosis

I removed and verified program ROMs UG12 and UJ12 – both were ok. Probing around the LDADDR bus revealed some horrific-looking signals on LADDR[08-11]:

The LADDR[00-07] signals appeared fine, so given that LADDR[08-15] originate from the 74LS374 at UG13, my impulse was to replace this IC. However, after doing so, there was no improvement. Hmm.

The program ROMs share the LADDR bus with the 52256 CMOS RAM at UJ11. I probed the VCC pin and was surprised to see this:

The CMOS RAM’s VCC is managed by the MAX691 at UH6. VCC is provided by the 3.0V battery when the game is powered-off and JAMMA 5V when the game is powered-on. The MAX691 also generates the global reset signal and provides a watchdog monitor:

I removed the MAX691 and connected pin 2 (VOUT) and pin 3 (VCC) together (with the battery removed) to tie the CMOS RAM VCC to 5V. After powering-up and pressing the reset button (to manually provide a /RESET pulse), the game worked fine. However, after installing a new MAX691, the problem persisted. Aaargh.

At this point, the only component left to change was the CMOS RAM itself at UJ11. After removing the RAM and installing a replacement, the game finally began working. Not the most straightforward of repairs but we got there eventually…

Fix

Replace LH5268A-10L SRAM at UJ11.

Philip Bennett